? semiconductor components industries, llc, 2000 march, 2000 ? rev. 8 349 publication order number: mc74hct273a/d mc74hct273a octal d flip-flop with common clock and reset with lsttl-compatible inputs high?performance silicon?gate cmos the mc74hct273a may be used as a level converter for interfacing ttl or nmos outputs to high?speed cmos inputs. the hct273a is identical in pinout to the ls273. this device consists of eight d flip?flops with common clock and reset inputs. each flip?flop is loaded with a low?to?high transition of the clock input. reset is asynchronous and active low. ? output drive capability: 10 lsttl loads ? ttl/nmos compatible input levels ? outputs directly interface to cmos, nmos and ttl ? operating voltage range: 4.5 to 5.5 v ? low input current: 1.0 m a ? in compliance with the requirements defined by jedec standard no. 7a ? chip complexity: 284 fets or 71 equivalent gates logic diagram data inputs d0 11 clock d1 d2 d3 d4 d5 d6 d7 18 17 14 13 8 7 4 3 1 reset 19 q0 q1 q2 q3 q4 q5 q6 q7 16 15 12 9 6 5 2 pin 20 = v cc pin 10 = gnd noninverting outputs function table inputs output reset clock d q lxx l hhh hll h l x no change h x no change x = don't care z = high impedance http://onsemi.com marking diagrams 1 20 a = assembly location wl = wafer lot yy = year ww = work week soic wide?20 dw suffix case 751d hct273a awlyyww pdip?20 n suffix case 738 1 20 mc74hct273an awlyyww 1 20 1 20 device package shipping ordering information mc74hct273an pdip?20 1440 / box mc74hct273adw soic?wide 38 / rail mc74hct273adwr2 soic?wide 1000 / reel pin assignment q2 d1 d0 q0 reset gnd q3 d3 d2 q1 5 4 3 2 1 10 9 8 7 6 14 15 16 17 18 19 20 11 12 13 q6 d6 d7 q7 v cc clock q4 d4 d5 q5
mc74hct273a http://onsemi.com 350 ??????????????????????? ??????????????????????? maximum ratings* ???? ???? symbol ?????????????? ?????????????? parameter ????? ????? value ??? ??? unit ???? ???? v cc ?????????????? ?????????????? dc supply voltage (referenced to gnd) ????? ????? 0.5 to + 7.0 ??? ??? v ???? ???? v in ?????????????? ?????????????? dc input voltage (referenced to gnd) ????? ????? 0.5 to v cc + 0.5 ??? ??? v ???? ???? v out ?????????????? ?????????????? dc output voltage (referenced to gnd) ????? ????? 0.5 to v cc + 0.5 ??? ??? v ???? ???? i in ?????????????? ?????????????? dc input current, per pin ????? ????? 20 ??? ??? ma ???? ???? i out ?????????????? ?????????????? dc output current, per pin ????? ????? 25 ??? ??? ma ???? ???? i cc ?????????????? ?????????????? dc supply current, v cc and gnd pins ????? ????? 50 ??? ??? ma ???? ? ?? ? ???? p d ?????????????? ? ???????????? ? ?????????????? power dissipation in still air plastic dip2 soic package2 ????? ? ??? ? ????? 750 500 ??? ? ? ? ??? mw ???? ???? t stg ?????????????? ?????????????? storage temperature ????? ????? 65 to + 150 ??? ??? c ???? ???? t l ?????????????? ?????????????? lead temperature, 1 mm from case for 10 seconds (soic or plastic dip) ????? ????? 260 ??? ??? c *maximum ratings are those values beyond which damage to the device may occur. functional operation should be restricted to the recommended operating conditions. 2derating e plastic dip: 10 mw/ c from 65 to 125 c soic package: 7 mw/ c from 65 to 125 c for high frequency or heavy load considerations, see chapter 2 of the on semiconductor high?speed cmos data book (dl129/d). recommended operating conditions ???? ???? symbol ??????????????? ??????????????? parameter ??? ??? min ?? ?? max ??? ??? unit ???? ???? v cc ??????????????? ??????????????? dc supply voltage (referenced to gnd) ??? ??? 4.5 ?? ?? 5.5 ??? ??? v ???? ???? v in , v out ??????????????? ??????????????? dc input voltage, output voltage (referenced to gnd) ??? ??? 0 ?? ?? v cc ??? ??? v ???? ???? t a ??????????????? ??????????????? operating temperature, all package types ??? ??? 55 ?? ?? + 125 ??? ??? c ???? ???? t r , t f ??????????????? ??????????????? input rise and fall time (figure 1) ??? ??? 0 ?? ?? 500 ??? ??? ns dc electrical characteristics (voltages referenced to gnd) ???? ???? ????????? ????????? ????????? ????????? ???? ???? ????????? ????????? guaranteed limit ??? ??? ???? ? ?? ? ???? symbol ????????? ? ??????? ? ????????? parameter ????????? ? ??????? ? ????????? test conditions ???? ? ?? ? ???? v cc v ???? ? ?? ? ???? 55 to 25 c ??? ? ? ? ??? 85 c ???? ? ?? ? ???? 125 c ??? ? ? ? ??? unit ???? ? ?? ? ???? v ih ????????? ? ??????? ? ????????? minimum high?level input voltage ????????? ? ??????? ? ????????? v out = 0.1 v or v cc 0.1 v |i out | 20 m a ???? ? ?? ? ???? 4.5 5.5 ???? ? ?? ? ???? 2.0 2.0 ??? ? ? ? ??? 2.0 2.0 ???? ? ?? ? ???? 2.0 2.0 ??? ? ? ? ??? v ???? ???? v il ????????? ????????? maximum low-level input voltage ????????? ????????? v out = 0.1 v or v cc 0.1 v |i out | 20 m a ???? ???? 4.5 5.5 ???? ???? 0.8 0.8 ??? ??? 0.8 0.8 ???? ???? 0.8 0.8 ??? ??? v ???? ? ?? ? ???? v oh ????????? ? ??????? ? ????????? minimum high?level output voltage ????????? ? ??????? ? ????????? v in = v ih or v il |i out | 20 m a ???? ? ?? ? ???? 4.5 5.5 ???? ? ?? ? ???? 4.4 5.4 ??? ? ? ? ??? 4.4 5.4 ???? ? ?? ? ???? 4.4 5.4 ??? ? ? ? ??? v ???? ? ?? ? ???? ????????? ? ??????? ? ????????? ????????? ? ??????? ? ????????? v in = v ih or v il |i out | 4.0 ma ???? ? ?? ? ???? 4.5 ???? ? ?? ? ???? 3.98 ??? ? ? ? ??? 3.84 ???? ? ?? ? ???? 3.7 ??? ? ? ? ??? ???? ? ?? ? ???? v ol ????????? ? ??????? ? ????????? maximum low?level output voltage ????????? ? ??????? ? ????????? v in = v ih or v il |i out | 20 m a ???? ? ?? ? ???? 4.5 5.5 ???? ? ?? ? ???? 0.1 0.1 ??? ? ? ? ??? 0.1 0.1 ???? ? ?? ? ???? 0.1 0.1 ??? ? ? ? ??? v ???? ???? ????????? ????????? ????????? ????????? v in = v ih or v il |i out | 4.0 ma ???? ???? 4.5 ???? ???? 0.26 ??? ??? 0.33 ???? ???? 0.4 ??? ??? ???? ? ?? ? ???? i in ????????? ? ??????? ? ????????? maximum input leakage current ????????? ? ??????? ? ????????? v in = v cc or gnd ???? ? ?? ? ???? 5.5 ???? ? ?? ? ???? 0.1 ??? ? ? ? ??? 1.0 ???? ? ?? ? ???? 1.0 ??? ? ? ? ??? m a ???? ? ?? ? ???? i cc ????????? ? ??????? ? ????????? maximum quiescent supply current (per package) ????????? ? ??????? ? ????????? v in = v cc or gnd i out = 0 m a ???? ? ?? ? ???? 5.5 ???? ? ?? ? ???? 4.0 ??? ? ? ? ??? 40 ???? ? ?? ? ???? 160 ??? ? ? ? ??? m a ???? ???? d i cc ????????? ????????? additional quiescent supply current ????????? ????????? v in = 2.4 v, any one input v i =v cc or gnd other in p uts ???? ???? ???? ???? ?55 c ?????? ?????? 25 c to 125 c ??? ??? ???? ???? ????????? ????????? current ????????? ????????? v in = v cc or gnd, other inputs l out = 0 m a ???? ???? 5.5 ???? ???? 2.9 ?????? ?????? 2.4 ??? ??? ma note: information on typical parametric values can be found in chapter 2 of the on semiconductor high-speed cmos data book (dl129/d). this device contains protection circuitry to guard against damage due to high static voltages or electric fields. however, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance cir? cuit. for proper operation, v in and v out should be constrained to the range gnd (v in or v out ) v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ). unused outputs must be left open.
mc74hct273a http://onsemi.com 351 ac electrical characteristics (v cc = 5.0 v 10%, c l = 50 pf, input t r = t f = 6.0 ns) ????? ????? ???????????????? ???????????????? ???? ???? ????????? ????????? guaranteed limit ??? ??? ????? ? ??? ? ????? symbol ???????????????? ? ?????????????? ? ???????????????? parameter ???? ? ?? ? ???? fig. ???? ? ?? ? ???? 55 to 25 c ??? ? ? ? ??? 85 c ???? ? ?? ? ???? 125 c ??? ? ? ? ??? unit ????? ????? f max ???????????????? ???????????????? maximum clock frequency (50% duty cycle) ???? ???? 1, 4 ???? ???? 30 ??? ??? 24 ???? ???? 20 ??? ??? mhz ????? ????? t plh , t phl ???????????????? ???????????????? maximum propagation delay, clock to q ???? ???? 1, 4 ???? ???? 25 ??? ??? 28 ???? ???? 35 ??? ??? ns ????? ????? t phl ???????????????? ???????????????? maximum propagation delay, reset to q ???? ???? 2, 4 ???? ???? 25 ??? ??? 28 ???? ???? 35 ??? ??? ns ????? ? ??? ? ????? t tlh , t thl ???????????????? ? ?????????????? ? ???????????????? maximum output transition time, any output ???? ? ?? ? ???? 1, 5 ???? ? ?? ? ???? 18 ??? ? ? ? ??? 20 ???? ? ?? ? ???? 22 ??? ? ? ? ??? ns note: for propagation delays with loads other than 50 pf, and information on typical parametric values, see chapter 2 of the on semiconductor high?speed cmos data book (dl129/d). typical @ 25 c, v cc = 5.0 v c pd power dissipation capacitance (per gate)* 30 pf * used to determine the no?load dynamic power consumption: p d = c pd v cc 2 f + i cc v cc . for load considerations, see chapter 2 of the on semiconductor high?speed cmos data book (dl129/d). ????????????????????????????????? ????????????????????????????????? timing requirements (v cc = 5.0 v 10%, c l = 50 pf, input t r = t f = 6.0 ns) ???? ???? ??????????????? ??????????????? ??? ??? ???????????? ???????????? guaranteed limit ??? ??? ???? ???? ??????????????? ??????????????? ??? ??? ????? ????? 55 to 25 c ????? ????? 85 c ???? ???? 125 c ??? ??? ???? ???? symbol ??????????????? ??????????????? parameter ??? ??? fig. ??? ??? min ??? ??? max ??? ??? min ??? ??? max ?? ?? min ??? ??? max ??? ??? unit ???? ???? t su ??????????????? ??????????????? minimum setup time, data to clock ??? ??? 3 ??? ??? 10 ??? ??? ??? ??? 12 ??? ??? ?? ?? 15 ??? ??? ??? ??? ns ???? ???? t h ??????????????? ??????????????? minimum hold time, clock to data ??? ??? 3 ??? ??? 3.0 ??? ??? ??? ??? 3.0 ??? ??? ?? ?? 3.0 ??? ??? ??? ??? ns ???? ???? t rec ??????????????? ??????????????? minimum recovery time, set or reset inactive to clock ??? ??? 2 ??? ??? 5.0 ??? ??? ??? ??? 5.0 ??? ??? ?? ?? 5.0 ??? ??? ??? ??? ns ???? ???? t w ??????????????? ??????????????? minimum pulse width, clock ??? ??? 1 ??? ??? 12 ??? ??? ??? ??? 15 ??? ??? ?? ?? 18 ??? ??? ??? ??? ns ???? ???? t w ??????????????? ??????????????? minimum pulse width, set or reset ??? ??? 2 ??? ??? 12 ??? ??? ??? ??? 15 ??? ??? ?? ?? 18 ??? ??? ??? ??? ns ???? ???? t r , t f ??????????????? ??????????????? maximum input rise and fall times ??? ??? 1 ??? ??? ??? ??? 500 ??? ??? ??? ??? 500 ?? ?? ??? ??? 500 ??? ??? ns
mc74hct273a http://onsemi.com 352 figure 1. clock q t r t f 3.0 v gnd 2.7 v 1.3 v 0.3 v 90% 1.3 v 10% t plh t phl t tlh t thl 1.3 v data clock 3.0 v figure 2. valid gnd *includes all probe and jig capacitance c l * test point device under test output figure 3. t w 1/f max 3.0 v gnd t su t h 1.3 v reset q clock t w 1.3 v 1.3 v 1.3 v 3.0 v gnd 3.0 v gnd t phl figure 4. test circuit t rec expanded logic diagram c d r q d0 3 2 q0 c d r q d1 4 5 q1 c d r q d2 7 6 q2 c d r q d3 8 9 q3 c d r q d4 13 12 q4 c d r q d5 14 15 q5 c d r q d6 17 16 q6 c d r q d7 18 19 q7 11 1 data inputs noninverting outputs clock reset switching waveforms
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